Voids and Delaminations


Time Domain Imaging (TDI)™
Utilizes an echo (amplitude & polarity) arrival ‘time’ as a reference, such as standard A-Scan, B-Scan and C-Mode type images.

Voids and Delaminations

Ceramic Chip Capacitor Voids and Delaminations - Application Note 2082

Voids and Delaminations

Sample & Method

Ceramic chip capacitors analyzed using the Bulk Scan imaging technique.


Internal mechanical defects in ceramic chip capacitors cause failures by permitting shorts between electrode plates. The common defects are voids, delaminations and cracks.

The capacitor at top has three voids, which typically occur between electrode plates. A short may occur immediately or after a period of use. The capacitor at bottom has a very large delamination between plates. It is not unusual for a single capacitor to have multiple delaminations at various depths.

The Q-BAM image was made to show the relative depth of the delaminations. Each delamination intersected by the white line in the planar image corresponds to a bright feature in the Q-BAM image. In the Q-BAM image it can be seen that the delaminations lie very slightly above the metallization pads on the substrate.